RADV Driver Now Leveraging RDNA3+ Hardware Feature For Better Instruction Cache Prefetching
RADV Driver Now Leveraging RDNA3+ Hardware Feature For Better Instruction Cache Prefetching
https://www.phoronix.com/news/RADV-INST-PREF-SIZE-RDNA3
Publish Date: 2026-06-10 05:49:00
Source Domain: www.phoronix.com
Initially introduced in RDNA3 (GFX11) GPUs is INST_PREF_SIZE to specify the number of instruction bytes to prefetch prior to a wavefront beginning execution. The Mesa Radeon Vulkan driver “RADV” is now making use of this feature in RDNA3/RDNA4 GPUs for better instruction cache prefetching.
Georg Lehmann of Valve’s Linux graphics team authored the patch for benefiting RDNA3 and newer GPUs with RADV by leveraging this INST_PREF_SIZE feature. Georg noted in the pull request that it should help improve shader start-up performance but didn’t quantify it all in the merge request or subsequent patch messages.
“INST_PREF_SIZE was added on GFX11, to prefetch shaders even beyond what the [Command Processor] DMA can do. It should improve shader startup performance.
Getting this to work for LSHS/NGG is a bit of a pain because of shader objects, vertex shader prologs and because the registers contain more than just the prefetch size.”
Presumably due to the pain to get it right is why this original RDNA3 functionality is only being implemented now for this open-source Radeon Vulkan Linux driver.
Samuel Pitoiset of Valve’s Linux team also looked over the code as did Marek Olšák who recently joined Valve too.
This merge for better instruction cache pre-fetching on RDNA3 and latter is now in place for next quarter’s Mesa 26.2 release.
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